UPORABA FPGA VEZIJ PRI UČNEM PROCESU IN IZVEDBA REGULACIJE PRETVORNIKA NAVZDOL

Otič, Jernej

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Title:	UPORABA FPGA VEZIJ PRI UČNEM PROCESU IN IZVEDBA REGULACIJE PRETVORNIKA NAVZDOL
Authors:	ID Otič, Jernej (Author) ID Jezernik, Karel (Mentor) More about this mentor... ID Pogorelc, Janez (Comentor)
Files:	VS_Otic_Jernej_2009.pdf (2,80 MB) MD5: 493D69A382B63661FA8C0A1C75EC3640 PID: 20.500.12556/dkum/24948065-dac4-49f1-9393-59b91836cc55
Language:	Slovenian
Work type:	Undergraduate thesis
Organization:	FERI - Faculty of Electrical Engineering and Computer Science
Abstract:	Diplomska naloga je sestavljena iz dveh delov, prvi del je prvenstveno namenjen kot navodilo za delo z učnim sistemom Nexys in vsebuje opis učne platforme Nexys, navodila za uporabo programskega paketa Xilinx ISE ter primere laboratorijskih vaj, ki so namenjene za delo z Nexys pri predmetu digitalna tehnika. Drugi del diplomske naloge pa je implementacija histereznega regulatorja za DC/DC pretvornik navzdol na učni platformi Nexys, opisan bo tudi nadzorno komunikacijski grafični vmesnik za PC, napisan v programskem paketu Delphi. V tem delu sem želel pokazati, kako lahko uporabimo različne tehnologije in različna programska orodja, da dobimo končni izdelek.
Keywords:	DC/DC Pretvornik navzdol, Delphi, RS232, histerezni regulator, programirna FPGA vezja, Xilinx, ISE
Place of publishing:	Maribor
Publisher:	[J. Otič]
Year of publishing:	2009
PID:	20.500.12556/DKUM-10369
UDC:	621.37.049(043.2)
COBISS.SI-ID:	13187606
NUK URN:	URN:SI:UM:DK:QZW78ATG
Publication date in DKUM:	15.05.2009
Views:	2560
Downloads:	214
Metadata:
Categories:	KTFMB - FERI
:	OTIČ, Jernej, 2009, UPORABA FPGA VEZIJ PRI UČNEM PROCESU IN IZVEDBA REGULACIJE PRETVORNIKA NAVZDOL [online]. Bachelor’s thesis. Maribor : J. Otič. [Accessed 16 March 2025]. Retrieved from: https://dk.um.si/IzpisGradiva.php?lang=eng&id=10369 Copy citation

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Secondary language

Language:	English
Title:	THE USE OF FPGA CIRCUITS IN EDUCATIONAL PROCESSES AND THE EXAMPLE OF REGULATION OF BUCK CONVERTER
Abstract:	This Diploma thesis consists of two parts. First part is meant to be a guideline for teaching system Nexys, and consists of: description of teaching platform Nexys, user’s manual for application package Xilinx ISE and of examples of laboratory seminars which are intended for work with Nexys in the “digitalna tehnika” course. The second part of diploma thesis is implementation of hysteresis regulator for DC/DC converter on teaching platform Nexys. In second part of diploma thesis I will also describe control communication graphical user interface for PC which is written in application package Delphi. In the diploma theses I want to show how we can use different technologies and different application tools to get final product.
Keywords:	DC/DC buck converter, Delphi, RS232, Hysteresis Regulator, field-programmable gate array, Xilinx, ISE

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