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Title:Digitalno-Analogne simulacije elektronskih vezij z uporabo odprtokodne programske opreme : magistrsko delo
Authors:Trčak, Matic (Author)
Gotlih, Karl (Mentor) More about this mentor... New window
Rodič, Miran (Mentor) More about this mentor... New window
Drevenšek, Dušan (Co-mentor)
Files:.pdf MAG_Trcak_Matic_2020.pdf (1,95 MB)
MD5: 7E04091D5B6D16BCDE78CC354C0218A9
Work type:Master's thesis/paper (mb22)
Typology:2.09 - Master's Thesis
Organization:FS - Faculty of Mechanical Engineering
Abstract:Magistrsko delo zajema preučevanje simulacijskega postopka analize digitalnih in analognih vezij na primeru 3-faznega razsmernika. Simulacije so izvedene izključno z uporabo odprtokodne programske opreme in vsebujejo povezavo s programskim vmesnikom v C-jeziku. Natančno je opisan postopek uporabe programskih orodij ngspice in LTspice. Opisano je programiranje v programskem jeziku strojne opreme Verilog. Analizirani so rezultati časovnih potekov bremenskih napetosti in tokov.
Keywords:Simulacije, digitalna vezja, analogna vezja, odprtokodna oprema, ngspice, Verilog, LTspice, vgrajeni sistemi, razsmernik
Year of publishing:2020
Place of performance:Maribor
Publisher:[M. Trčak]
Number of pages:X, 94 str.
COBISS_ID:27584515 New window
Categories:KTFMB - FS
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License:CC BY-SA 4.0, Creative Commons Attribution-ShareAlike 4.0 International
Description:This Creative Commons license is very similar to the regular Attribution license, but requires the release of all derivative works under this same license.
Licensing start date:11.06.2020

Secondary language

Title:Mixed-Signal simulation with the use of open-source software equipment
Abstract:The thesis studies the simulation process of mixed-signal circuits on the example of a 3-phase inverter. The simulations are performed exclusively on open-source software (OSS) and include co-simulation with embedded C language. The use of ngspice and LTspice software is described in a step-by-step process. Simulation includes the use of hardware-description language Verilog. The conclusion analyzes the results of time-voltage and current graphs on the output nodes of the inverter.
Keywords:Simulation, digital circuits, analog circuits, mixed-signal, open-source software, ngspice, Verilog, LTspice, embedded systems, inverter


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